/*--------------------------------------------------------------------------
XC8FT8463.H

Header file for XC8FT8463
Copyright (c) 2014-2020 Runtronic 
All rights reserved.
V0.1
--------------------------------------------------------------------------*/

#ifndef XC8FT8463_H
#define XC8FT8463_H

/*CPU*/
sfr     SP              = 0x81;         // 堆栈指针 
sfr     DPL0            = 0x82;         // 数据指针0低8位
sfr     DPH0            = 0x83;         // 数据指针0高8位
sfr     DPL1            = 0x84;         // 数据指针1低8位
sfr     DPH1            = 0x85;         // 数据指针1低8位
sfr     DPS             = 0x86;         // 使用DPTR0/DPTR1寄存器选择位
sfr     P2              = 0xA0;         // P2读写寄存器

/* ------------------- 位寄存器-------------------- */
sfr     PSW             = 0xD0;         // 程序状态字
sbit    PSW_CY          = PSW^7;        // 标志位           0:加法运算最高位无进位，或者减法运算最高位无借位时        1:加法运算最高位有进位，或者减法运算最高位有借位时
sbit    PSW_AC          = PSW^6;        // 进位辅助标志位   0:无借位、进位        1:加法运算时在bit3位有进位，或减法运算在bit3位有借位时
sbit    PSW_F0          = PSW^5;        // 用户标志位
sbit    PSW_RS1         = PSW^4;        // 工作寄存器组选择位
sbit    PSW_RS0         = PSW^3;        // 工作寄存器组选择位
sbit    PSW_OV          = PSW^2;        // 溢出标志位
sbit    PSW_F1          = PSW^1;        // F1标志
sbit    PSW_Parity      = PSW^0;        // 奇偶标志位       0:ACC中1的个数为偶数（包括0个）

sfr     ACC             = 0xE0;         // 累加器A
sbit    ACC_7           = ACC^7;
sbit    ACC_6           = ACC^6;
sbit    ACC_5           = ACC^5;
sbit    ACC_4           = ACC^4;
sbit    ACC_3           = ACC^3;
sbit    ACC_2           = ACC^2;
sbit    ACC_1           = ACC^1;
sbit    ACC_0           = ACC^0;

sfr     B               = 0xF0;         // 通用寄存器B

//----------------------总中断控制寄存器--------------------
sfr     IE              = 0xA8;         // 系统中断控制寄存器
sbit    IE_EA           = IE^7;         // CPU总中断开关允许位



//------------------------------------------
#define SLPTIM_BASE 0x88

sfr     SLPTIM_CR       = 0xF8;         // 睡眠计数器控制寄存器
sbit    SLPIE           = SLPTIM_CR^7;  // 睡眠定时器中断使能位
sbit    WDTEN           = SLPTIM_CR^5;  // 看门狗定时器使能
sbit    X32K_SEL        = SLPTIM_CR^4;  // 32K时钟源选择
sbit    SLEEPDIS        = SLPTIM_CR^3;  // 睡眠定时器使能

sfr     SLPTIM_SR       = 0xF9;         // 睡眠计数寄存器
sfr     SLPTIM_CLR      = 0xFA;         // 看门狗清除寄存器
sfr     SLPTIM_WDT      = 0xFB;         // 看门狗计数器状态寄存器
sfr     SLPTIM_CNTL     = 0xFC;         // 睡眠计数器计数值低8位寄存器
sfr     SLPTIM_CNTH     = 0xFD;         // 睡眠计数器计数值高8位寄存器
sfr     SLPTIM_PRDRL    = 0xFE;         // 睡眠计数器预分频低8位
sfr     SLPTIM_PRDRH    = 0xFF;         // 睡眠计数器预分频高8位
//sfr16    SLPTIM_PRDR  = 0x8F8E;


//-----------------------系统模式控制寄存器-------------------
sfr     SCR_CFG         = 0x91;         // 系统配置寄存器
sfr     SCR_SLEEP       = 0x92;         // 休眠寄存器
sfr     MBIST_CFG       = 0x93;         // 校准寄存器    

//-----------------------与时钟相关寄存器-------------------
sfr     CLK_CR          = 0x94;         // 系统时钟控制寄存器
sfr     PCLK_CR         = 0x95;         // 外设时钟控制寄存器
sfr     PCLK_DIV12      = 0x96;         // SCK1\SCK2时钟控制寄存器
sfr     PCLK_DIV3       = 0x97;         // SCK3时钟控制寄存器


//------------------------与I2C相关寄存器------------------
sfr     I2C_ADDR        = 0xA1;         // I2C从机地址寄存器  
sfr     I2C_CR          = 0xA2;         // I2C控制寄存器
sfr     I2C_STAT        = 0xA3;         // I2C状态寄存器
sfr     I2C_DR          = 0xA4;         // I2C数据寄存器
sfr     I2C_MCR         = 0xA5;         // I2C主机控制寄存器
sfr     I2C_BURST_CR    = 0xA6;         // I2C主机控制寄存器

//------------------------与中断相关寄存器------------------
sfr     IP              = 0xB8;         //
sfr     IP1             = 0xB9;         //
sfr     IP2             = 0xBA;         //

//-------------------------与模拟比较器相关寄存器-----------------
sfr     AC0_CR1         = 0xE1;         // 模拟比较器0控制寄存器1
sfr     AC0_CR2         = 0xE2;         // 模拟比较器0控制寄存器2
sfr     AC0_DASEL       = 0xE3;
sfr     AC1_CR1         = 0xE4;         // 模拟比较器1控制寄存器1
sfr     AC1_CR2         = 0xE5;         // 模拟比较器1控制寄存器2
sfr     AC1_DASEL       = 0xE6;


#define TIMER_BASE 0xC0
sfr     CKCON           = 0x8E;
sfr     TCON            = 0x88;
sfr     TMOD            = 0x89;
sfr     TL0             = 0x8A;
sfr     TL1             = 0x8B;
sfr     TH0             = 0x8C;
sfr     TH1             = 0x8D;

//------------------------与TIMER2相关寄存器------------------
sfr     T2CON           = 0xC8;         //
sfr     RCAP2L          = 0xCA;         //
sfr     RCAP2H          = 0xCB;         //
sfr     TL2             = 0xCC;         //
sfr     TH2             = 0xCD;         //


//------------------------与UART0相关寄存器------------------
sfr     SCON0           = 0x98;         //
sfr     SBUF0           = 0x99;         //
sfr     SCON1           = 0x9A;         //
sfr     SBUF1           = 0x9B;         //
sfr     PCON            = 0x87;         //

//-------------------------与SPI相关寄存器-----------------
sfr     SPI_ICR         = 0xF1;         // SPI移位寄存器
sfr     SPI_DR          = 0xF2;         // SPI数据寄存器
sfr     SPI_CR          = 0xF3;         // SPI控制寄存器
sfr     SPI_STAT        = 0xF4;         // SPI状态寄存器
sfr     SPI_CR2         = 0xF5;         // SPI突发控制寄存器
sfr     SPI_WRADDR      = 0xF6;         // SPI突发地址寄存器

//------------------------与ADC相关寄存器------------------
sfr     ADC_CR0         = 0xE8;         // ADC转换控制寄存器0
sfr     ADC_CR1         = 0xE9;         // ADC转换控制寄存器1
sfr     ADC_CR2         = 0xEA;         // ADC转换控制寄存器2
sfr     ADC_CHSEL       = 0xEB;         // ADC模拟量输入通道选择寄存器
sfr     ADC_CON         = 0xEC;         // ADC配置寄存器
sfr     ADC_DLY         = 0xED;         // ADC延迟配置寄存器
sfr     ADC_RESL        = 0xEE;         // ADC转换结果低4位寄存器
sfr     ADC_RESH        = 0xEF;         // ADC转换结果高8位寄存器
sfr     ADC_COMPL       = 0xF6;         // ADC比较值低4位寄存器
sfr     ADC_COMPH       = 0xF7;         // ADC比较值高8位寄存器

//------------------------与GPIO相关寄存器------------------
sfr     P0_DR           = 0x80;         // 端口P0数据寄存器
//------------P00/P01/P02/P03/P04/P05/P06/P07-------------------
sbit    P0_0            = P0_DR^0;  
sbit    P0_1            = P0_DR^1;  
sbit    P0_2            = P0_DR^2; 
sbit    P0_3            = P0_DR^3;  
sbit    P0_4            = P0_DR^4;  
sbit    P0_5            = P0_DR^5; 
sbit    P0_6            = P0_DR^6;  
sbit    P0_7            = P0_DR^7; 

sfr     P1_DR           = 0x90;         // 端口P1数据寄存器
//------------P10/P11/P12/P13/P14/P15/P16/P17-------------------
sbit    P1_0            = P1_DR^0; 
sbit    P1_1            = P1_DR^1;  
sbit    P1_2            = P1_DR^2;  
sbit    P1_3            = P1_DR^3; 
sbit    P1_4            = P1_DR^4;  
sbit    P1_5            = P1_DR^5;  
sbit    P1_6            = P1_DR^6;  
sbit    P1_7            = P1_DR^7;

sfr     P2_DR           = 0xA0;         // 端口P2数据寄存器
//------------P20/P21/P22/P23/P24/P25/P26/P27-------------------------------------
sbit    P2_0            = P2_DR^0;  
sbit    P2_1            = P2_DR^1; 
sbit    P2_2            = P2_DR^2; 
sbit    P2_3            = P2_DR^3; 
sbit    P2_4            = P2_DR^4; 
sbit    P2_5            = P2_DR^5; 
sbit    P2_6            = P2_DR^6; 
sbit    P2_7            = P2_DR^7; 


sfr     P3_DR           = 0xB0;         // 端口P3数据寄存器
//------------P30/P31-------------------------------------------------------------
sbit    P3_0            = P3_DR^0;  
sbit    P3_1            = P3_DR^1; 



//-------------------------------------------------
// XDATA SFRs


//MTP CONTROLLER
#define MTP_CR_BASE     0xFF00
#define FLASH_CR        *(unsigned char volatile xdata *)(MTP_CR_BASE)
#define FLASH_CFG       *(unsigned char volatile xdata *)(MTP_CR_BASE+0x1)
#define FLASH_KEY       *(unsigned char volatile xdata *)(MTP_CR_BASE+0x2)
#define FLASH_ADL       *(unsigned char volatile xdata *)(MTP_CR_BASE+0x3)
#define FLASH_ADH       *(unsigned char volatile xdata *)(MTP_CR_BASE+0x4)
#define FLASH_PBUFL     *(unsigned char volatile xdata *)(MTP_CR_BASE+0x5)
#define FLASH_PBUFH     *(unsigned char volatile xdata *)(MTP_CR_BASE+0x6)
#define FLASH_DR        *(unsigned char volatile xdata *)(MTP_CR_BASE+0x7)
//GPIO
#define PT_AFR          *(unsigned char volatile xdata *)(0xFF08)         //revise 0506
#define PT_AFR1         *(unsigned char volatile xdata *)(0xFF09)         //revise 0506
#define PT_DIG_TEST     *(unsigned char volatile xdata *)(0xFF8F)         //add by zfb 0517

#define P0DM_BASE       0xFF40            //revise 0506
#define P0_DM0          *(unsigned char volatile xdata *)(P0DM_BASE+0x0) 
#define P0_DM1          *(unsigned char volatile xdata *)(P0DM_BASE+0x1)  
#define P0_DM2          *(unsigned char volatile xdata *)(P0DM_BASE+0x2) 
 
#define P1DM_BASE       0xFF48            //revise 0506
#define P1_DM0          *(unsigned char volatile xdata *)(P1DM_BASE+0x0) 
#define P1_DM1          *(unsigned char volatile xdata *)(P1DM_BASE+0x1)  
#define P1_DM2          *(unsigned char volatile xdata *)(P1DM_BASE+0x2) 

#define P2DM_BASE       0xFF50            //revise 0506
#define P2_DM0          *(unsigned char volatile xdata *)(P2DM_BASE+0x0) 
#define P2_DM1          *(unsigned char volatile xdata *)(P2DM_BASE+0x1)  
#define P2_DM2          *(unsigned char volatile xdata *)(P2DM_BASE+0x2) 

#define P3DM_BASE       0xFF58            //revise 0506
#define P3_DM0          *(unsigned char volatile xdata *)(P3DM_BASE+0x0) 
#define P3_DM1          *(unsigned char volatile xdata *)(P3DM_BASE+0x1)  
#define P3_DM2          *(unsigned char volatile xdata *)(P3DM_BASE+0x2) 


#define P0_BASE         0xFF10            //revise 0506
#define P0_FLAG         *(unsigned char volatile xdata *)(P0_BASE+0x0) 
#define P0_GE           *(unsigned char volatile xdata *)(P0_BASE+0x1)
#define P0_PU           *(unsigned char volatile xdata *)(P0_BASE+0x2) 
#define P0_IE           *(unsigned char volatile xdata *)(P0_BASE+0x5)  
#define P0_IC0          *(unsigned char volatile xdata *)(P0_BASE+0x6) 
#define P0_IC1          *(unsigned char volatile xdata *)(P0_BASE+0x7)  
   
//#define P0_PD         *(unsigned char volatile __xdata *)(P0_BASE+0x7)  

#define P1_BASE         0xFF18            //revise 0506
#define P1_FLAG         *(unsigned char volatile xdata *)(P1_BASE+0x0) 
#define P1_GE           *(unsigned char volatile xdata *)(P1_BASE+0x1)
#define P1_PU           *(unsigned char volatile xdata *)(P1_BASE+0x2) 
#define P1_IE           *(unsigned char volatile xdata *)(P1_BASE+0x5)  
#define P1_IC0          *(unsigned char volatile xdata *)(P1_BASE+0x6) 
#define P1_IC1          *(unsigned char volatile xdata *)(P1_BASE+0x7)  
   
//#define P1_PD         *(unsigned char volatile __xdata *)(P1_BASE+0x7) 

#define P2_BASE         0xFF20            //revise 0506
#define P2_FLAG         *(unsigned char volatile xdata *)(P2_BASE+0x0)  
#define P2_GE           *(unsigned char volatile xdata *)(P2_BASE+0x1)
#define P2_PU           *(unsigned char volatile xdata *)(P2_BASE+0x2) 
#define P2_IE           *(unsigned char volatile xdata *)(P2_BASE+0x5)  
#define P2_IC0          *(unsigned char volatile xdata *)(P2_BASE+0x6) 
#define P2_IC1          *(unsigned char volatile xdata *)(P2_BASE+0x7)  
  
//#define P2_PD         *(unsigned char volatile __xdata *)(P2_BASE+0x7)  

#define P3_BASE         0xFF28            //revise 0506
#define P3_FLAG         *(unsigned char volatile xdata *)(P3_BASE+0x0)  
#define P3_PU           *(unsigned char volatile xdata *)(P3_BASE+0x2) 
#define P3_IE           *(unsigned char volatile xdata *)(P3_BASE+0x5)  
#define P3_IC0          *(unsigned char volatile xdata *)(P3_BASE+0x6) 
#define P3_IC1          *(unsigned char volatile xdata *)(P3_BASE+0x7)  

//-------------------------------------------------
#define ANA_BASE        0xFF80
#define BG_CR           *(unsigned char volatile xdata *)(ANA_BASE)
#define BG_VTRIM        *(unsigned char volatile xdata *)(ANA_BASE+0x1)
#define BG_ITRIM        *(unsigned char volatile xdata *)(ANA_BASE+0x2)
#define BG_TCTRIM       *(unsigned char volatile xdata *)(ANA_BASE+0x3)
#define BG_TEST         *(unsigned char volatile xdata *)(ANA_BASE+0x4)
#define BORLVD_CR       *(unsigned char volatile xdata *)(ANA_BASE+0x5)
#define BORLVD_STAT     *(unsigned char volatile xdata *)(ANA_BASE+0x6)
#define ANA_TEST        *(unsigned char volatile xdata *)(ANA_BASE+0x7)
#define IMO_CR          *(unsigned char volatile xdata *)(ANA_BASE+0x8)
#define IMO_TRIM        *(unsigned char volatile xdata *)(ANA_BASE+0x9)
#define ILO_TRIM        *(unsigned char volatile xdata *)(ANA_BASE+0xA)
#define ILO_TEST        *(unsigned char volatile xdata *)(ANA_BASE+0xB)
#define IMO_TRIMH       *(unsigned char volatile xdata *)(ANA_BASE+0xC)
#define XTAL_CR         *(unsigned char volatile xdata *)(ANA_BASE+0xD)
#define MBIST_KEY       *(unsigned char volatile xdata *)(ANA_BASE+0xE)

//-------------------------------------------------
#define CMP_BASE        0xFF90
#define AC0_CR3         *(unsigned char volatile xdata *)(CMP_BASE+0x0)
#define AC0_CR4         *(unsigned char volatile xdata *)(CMP_BASE+0x1)
#define AC0_CR5         *(unsigned char volatile xdata *)(CMP_BASE+0x2)
#define AC0_CR6         *(unsigned char volatile xdata *)(CMP_BASE+0x3)
#define AC1_CR3         *(unsigned char volatile xdata *)(CMP_BASE+0x8)
#define AC1_CR4         *(unsigned char volatile xdata *)(CMP_BASE+0x9)
#define AC1_CR5         *(unsigned char volatile xdata *)(CMP_BASE+0xA)
#define AC1_CR6         *(unsigned char volatile xdata *)(CMP_BASE+0xB)
#define AC_BUFCR0       *(unsigned char volatile xdata *)(CMP_BASE+0x6)
#define DAC_BUFCR1      *(unsigned char volatile xdata *)(CMP_BASE+0x7)

#define BUF_OSN         *(unsigned char volatile xdata *)(CMP_BASE+0xC)
#define BUF_OSP         *(unsigned char volatile xdata *)(CMP_BASE+0xD) 

#define DAC_BUFCR2      *(unsigned char volatile xdata *)(CMP_BASE+0xE)
#define DAC_BUFCR3      *(unsigned char volatile xdata *)(CMP_BASE+0xF)

//-------------------------------------------------
#define DISP_BASE       0xFFA0
#define DISP_CR         *(unsigned char volatile xdata *)(DISP_BASE+0x0)
#define DISP_VAL        *(unsigned char volatile xdata *)(DISP_BASE+0x1)

//#define PWM_BASE      0xFFD0
//#define PWM_CFG       *(unsigned char volatile __xdata *)(PWM_BASE+0x0)
//#define PWM_CON       *(unsigned char volatile __xdata *)(PWM_BASE+0x1)
//#define PWM_PRD       *(unsigned char volatile __xdata *)(PWM_BASE+0x2)
//#define PWM_CR1       *(unsigned char volatile __xdata *)(PWM_BASE+0x3)
//#define PWM_CR2       *(unsigned char volatile __xdata *)(PWM_BASE+0x4)
//#define PWM_DUTY_0    *(unsigned char volatile __xdata *)(PWM_BASE+0x5)
//#define PWM_DUTY_1    *(unsigned char volatile __xdata *)(PWM_BASE+0x6)
//#define PWM_DUTY_2    *(unsigned char volatile __xdata *)(PWM_BASE+0x7)
//#define PWM_DUTY_3    *(unsigned char volatile __xdata *)(PWM_BASE+0x8)
//#define PWM_DUTY_4    *(unsigned char volatile __xdata *)(PWM_BASE+0x9)
//#define PWM_DUTY_5    *(unsigned char volatile __xdata *)(PWM_BASE+0xA)
//#define PWM_DF        *(unsigned char volatile __xdata *)(PWM_BASE+0xB)
sfr     PWM_CFG         = 0xD1; 
sfr     PWM_CON         = 0xD2; 
sfr     PWM_PRD         = 0xD3; 
sfr     PWM_CR1         = 0xD4; 
sfr     PWM_CR2         = 0xD5; 
sfr     PWM_DUTY_0      = 0xD6; 
sfr     PWM_DUTY_1      = 0xD7; 
sfr     PWM_DUTY_2      = 0xDA; 
sfr     PWM_DUTY_3      = 0xDB; 
sfr     PWM_DUTY_4      = 0xDC; 
sfr     PWM_DUTY_5      = 0xDD; 
sfr     PWM_DF          = 0xDE; 
sfr     PWM_BRAKE       = 0xDF;  


//-------------------------------------------------
//touch Sensor Port Register
#define CSD_BASE        0xFFE0  
#define CSD_CR          *(unsigned char volatile xdata *)(CSD_BASE+0x0)
#define CSD_SIN_CKSEL   *(unsigned char volatile xdata *)(CSD_BASE+0x1)
#define CSD_CKSEL       *(unsigned char volatile xdata *)(CSD_BASE+0x2)
#define CSD_STAT        *(unsigned char volatile xdata *)(CSD_BASE+0x3)
#define CSD_PRSH        *(unsigned char volatile xdata *)(CSD_BASE+0x4)
#define CSD_PRSL        *(unsigned char volatile xdata *)(CSD_BASE+0x5)
#define CSD_POLYH       *(unsigned char volatile xdata *)(CSD_BASE+0x6)
#define CSD_POLYL       *(unsigned char volatile xdata *)(CSD_BASE+0x7)
#define CSD_WIN         *(unsigned char volatile xdata *)(CSD_BASE+0x8)
#define CSD_VREF_CR     *(unsigned char volatile xdata *)(CSD_BASE+0x9)
#define CSD_WPF_CR      *(unsigned char volatile xdata *)(CSD_BASE+0xA)
#define CSD_PMU_CR      *(unsigned char volatile xdata *)(CSD_BASE+0xB)
#define CSD_RX0_CR      *(unsigned char volatile xdata *)(CSD_BASE+0x10)
#define CSD_RX0_TH      *(unsigned char volatile xdata *)(CSD_BASE+0x11)
#define CSD_RX0_ICOM    *(unsigned char volatile xdata *)(CSD_BASE+0x12)
#define CSD_RX0_IMS     *(unsigned char volatile xdata *)(CSD_BASE+0x13)
#define CSD_RX0_DRH     *(unsigned char volatile xdata *)(CSD_BASE+0x14)
#define CSD_RX0_DRL     *(unsigned char volatile xdata *)(CSD_BASE+0x15)

#define CSD_PRS         *(unsigned short volatile xdata *)(CSD_BASE+0x4)
#define CSD_POLY        *(unsigned short volatile xdata *)(CSD_BASE+0x6)
#define CSD_RX0_DR      *(unsigned short volatile xdata *)(CSD_BASE+0x14)

//-------------------------------------------------
//MTP CHECKSUM Register
#define CHKSUM_BASE     0xFFB0  
#define CHKSUM_CR       *(unsigned char volatile xdata *)(CHKSUM_BASE+0x0)
#define CHKSUM_SUMH     *(unsigned char volatile xdata *)(CHKSUM_BASE+0x1)
#define CHKSUM_SUML     *(unsigned char volatile xdata *)(CHKSUM_BASE+0x2)

typedef bit             BOOL;         // 布尔变量（位变量）
typedef unsigned char   u8;  
typedef unsigned short  u16;
typedef unsigned long   u32;

typedef signed char     s8;  
typedef signed short    s16;
typedef signed long     s32;

#endif
